LTC4253ACGN#TRPBF【PDF 4/34 页】IC HOT SWAP CONTRLR -48V 16-SSOP

LTC4253/LTC4253A

4

425353aff

For more information www.linear.com/4253

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T

A

= 25癈.

SYMBOL PARAMETER

CONDITIONS

LTC4253

LTC4253A

UNITS

MIN TYP MAX MIN TYP MAX

V

OV

OV Pin Threshold

OV Low to High

?/DIV>

5.04 5.09 5.14

V

OVHST

OV Pin Hysteresis

?/DIV>

230 300 350

82

102

122

mV

I

SENSE

SENSE Pin Input Current

UV = 0V = 4V , V

SENSE

= 50mV

(Sourcing)

?/DIV>

15

30

15

30

礎

I

INP

UV , OV Pin Input Current

UV = OV = 4V

?/DIV>

?.1 ?

礎

V

TMRH

TIMER Pin Voltage High Threshold

?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3"> 3.5

4

4.5

3.5

4

4.5

V

TMRL

TIMER Pin Voltage Low Threshold

?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3"> 0.8

1

1.2

0.8

1

1.2

V

I

TMR

TIMER Pin Current

Timer On (Initial Cycle/Latchoff,

Sourcing), V

TMR

= 2V

?/DIV>

3

5

7

3

5

7

礎

Timer Off (Initial Cycle, Sinking),

V

TMR

= 2V

28

mA

Timer On (Circuit Breaker, Sourcing,

I

DRN

= 0礎), V

TMR

= 2V

?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3"> 120 200 280 120 200 280

礎

Timer On (Circuit Breaker, Sourcing,

I

DRN

= 50礎), V

TMR

= 2V

600

礎

Timer Off (Circuit Breaker, Sinking),

V

TMR

= 2V

?/DIV>

3

5

7

3

5

7

礎

I

TMRACC

I

DRN

I

TMR

at I

DRN

= 50礎 I

TMR

at I

DRN

= 0礎

50礎

Timer On (Circuit Breaker with

I

DRN

= 50礎)

?/DIV>

7

8

9

7

8

9

礎/礎

V

SQTMRH

SQTIMER Pin Voltage High Threshold

?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3"> 3.5

4

4.5

3.5

4

4.5

V

SQTMRL

SQTIMER Pin Voltage Low Threshold

0.33

V

I

SQTMR

SQTIMER Pin Current

SQTIMER On (Power Good

Sequence, Sourcing), V

SQTMR

= 2V

?/DIV>

3

5

7

3

5

7

礎

SQTIMER Off (Power Good

Sequence, Sinking), V

SQTMR

= 2V

28

mA

V

DRNL

DRAIN Pin Voltage Low Threshold

For PWRGD1, PWRGD2, PWRGD3 Status

?/DIV>

2

2.39

3

2

2.39

3

V

I

DRNL

DRAIN Leakage Current

V

DRAIN

= 5V

V

DRAIN

= 4V

?.1 ?

?.1

?

礎

V

DRNCL

DRAIN Pin Clamp Voltage

I

DRN

= 50礎

?/DIV>

6

7

8.5

5

6

7.5

V

PGL

PWRGD1, PWRGD2, PWRGD3

Output Low Voltage

I

PG

= 1.6mA

I

PG

= 5mA

?

?/DIV>

0.25 0.4

1.2

0.25 0.4

1.2

V

I

PGH

PWRGD1, PWRGD2, PWRGD3

Output High Current

V

PG

= 0V (Sourcing)

?SPAN class="pst LTC4253ACGN-TRPBF_2330559_3"> 30

50

70

30

50

70

礎

t

SQ

SQTIMER Default Ramp Period

SQTIMER Pin Floating,

V

SQTMR

Ramps from 0.5V to 3.5V

250

祍

t

SS

SS Default Ramp Period

SS Pin Floating, V

SS

Ramps from 0.2V to 2V

SS Pin Floating, V

SS

Ramps from 0.2V to 1.25V

250

140

祍

t

PLLUG

UV Low to GATE Low

?/DIV>

0.4

5

0.4

5

祍

t

PHLOG

OV High to GATE Low

?/DIV>

0.4

5

0.4

5

祍

Note 2: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to V

EE

unless otherwise

specified.

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